The invention relates to digital data processing. More particularly, the invention relates to an integrated circuit for time and space switching of digital data.
With the maturation of the computer and surrounding technologies, vast amounts of complex, mixed traffic types are transmitted through synchronous optical networks (SONETs). The SONET standard is described in the American National Standards Institute (ANSI) standards T1.105 and T1.106 and in the Bellcore Technical Recommendations TR-TSY-000253. However, current SONET infrastructure has not kept pace with this rapid information technology shift and, as a result, network throughput is slowing down significantly due to increased traffic load.
Carriers that operate SONET-based metropolitan area networks (MANs) are especially impacted by this growing congestion. These carriers operate SONET rings to provide carrier services. SONET, and its international variant, Synchronous Digital Hierarchy (SDH), are deployed throughout North America, Latin America, Europe, the Pacific Rim and Asia. SONET and SDH are the de facto standard for physical layer optical transport. SONET provides massive transport scalability and the ability to support numerous network elements (NEs).
Traditional SONET signals were designed based on strictly defined and xe2x80x9cchunkyxe2x80x9d telco line rates. Regardless of composition and requirements under such strictly defined line rates, traffic must fit into a specific bandwidth slot whether or not the traffic uses the full bandwidth allocation. Besides these limitations, current SONET equipment does not support non-voice digital data such as Ethernet traffic, local area network (LAN) traffic, asynchronous transfer mode (ATM) traffic, frame relay (FR) traffic, Internet Protocol (IP) traffic. Further, traditional SONET signals are inefficient when carrying non-voice data signals.
The basic building block of SONET networks is the SONET ring connection. FIG. 1a illustrates a basic SONET ring connection. SONET switch 100 and SONET switch 150 receive optical signals from various devices (not shown in FIG. 1). SONET switch 100 and SONET switch 150 can be coupled to other SONET switches, or other devices that communicate data using optical signals.
SONET switch 100 and SONET switch 150 communicate using two sets of uni-directional signaling pairs. In general, half of the traffic between switches travels over one of the signaling pairs and the other half of the traffic travels over the other signaling pair. SONET switches communicate according to a predetermined protocol, and at a predetermined bit rate.
Telecommunications (Telco) SONET systems have been designed and implemented using digital signaling (DS) technology, which is well known in the art. In the tables that follow, bit rates are set forth as bits per second (bps) and multiples thereof. The following Telco hierarchy provides a foundation for the SONET hierarchy set forth below.
SONET signals are Synchronous Transport Signals (STS) and Optical Carrier (OC) signals. Common SONET protocols include the following:
The following table describes SONET inefficiencies when carrying Ethernet signals; however, other protocols can be similarly inefficient.
In SONET networks, network elements typically convert electrical signals are converted to optical signals for transport over SONET connections. The data, however, is generated and manipulated as electrical signals. For example, telephones convert audio signals to analog electrical signals, which are converted to digital electrical signals and finally to optical signals. Computer systems generate analog and/or digital signals, which are converted to optical signals. The optical signals are transported over SONET connections.
FIG. 1b illustrates an example of conversion of electrical signals to optical SONET data. User data 110 can be any type of digital data, for example, a file generated by a computer system, LAN traffic, or a telephone call that has been converted to digital signals. User data 110 coming into the SONET system is typically data based on the Telco hierarchy. Thus, prior to the transport of OC signals, the first stage of the SONET transport mechanism usually creates, multiplexes, and manages SONET signals in their electrical format (e.g., as STS signals).
User data 110 is sent to SONET multiplexing device 140 that adds a path overhead header (POH) to user data 110 to generate a synchronous payload envelope (SPE) 115. subsequently, SONET multiplexing device 140 adds a transport overhead header (TOH) and STS frame 120 is formed. STS frame 120 is sent to electrical-optical conversion unit 125, which creates OC-1 signal 130.
STS frame 120 can include various frame sizes and may also be transported at various speeds. A standard building block for the STS frame is the STS-1 protocol, which specifies 810 bytes transmitted every 125 microseconds (xcexcsec), resulting in a line rate of 51.840 Mbps. Accordingly, in FIG. 1b, an electrical 51.840 Mbps line signal generated by STS-1 frame 120 would result in an optical OC-1 signal on the output of electrical-optical conversion unit 125.
The output of electrical-optical conversion unit 125 can be provided to a second stage of a SONET transport mechanism (not shown in FIG. 1b) that is used to groom multiple signals and add/drop OC-1 signals to create, for example, OC-3 or OC-12 signals. Using this multiple staging format, conventional optical network systems provide a flexible design that creates a robust transport layer for various data formats.
The multiple staging of optical network systems, however, requires a large number of varying components to handle the different levels of communication signals. Accordingly, the cost of development for conventional optical network systems, and the cost of maintaining conventional optical systems is high. Additionally, each time a new communications signal is introduced to an existing SONET transport mechanism, the staging system that receives/transports the new signal must be reconfigured and/or replaced with a new staging system. Accordingly, the integration of multiple staging components would be a desired result. The integration of these multiple staging components into a single optical network design, however, results in several disadvantages.
FIG. 2 illustrates a basic SONET architecture having multiple SONET switches communicating at different bit rates. In general, the SONET architecture of FIG. 2 illustrates Metro Access loops and a Metro Transport loop. Metro Access loops are relatively low speed (e.g., OC-3, OC-12) connections between SONET switches, such as SONET switches 210 and 260, and other devices, such as IP device 200 and FR device 205 coupled to SONET switch 210 and DSL device 270 and Ethernet device 275 coupled to SONET switch 260.
SONET switch 210 is coupled to SONET switch 220 via two OC-3 connections. As mentioned above, each SONET connection includes two uni-directional connections having the same bit rate. SONET switch 260 is coupled to SONET switch 250 via two OC-12 connections. SONET switch 220 is coupled to SONET switch 230 via two OC-48 connections and to SONET switch 240 via two OC-48 connections. SONET switch 250 is coupled to SONET switch 230 via two OC-192 connections and to SONET switch 240 via two OC-192 connections.
The Metro Access loops generally communicate with devices other than SONET switches to bring data into the SONET ring. Therefore, the SONET switches in the Metro Access loops generally communicate at lower bit rates than could otherwise be possible using optical technology.
The SONET switches of the Metro Access loops communicate with SONET switches of the Metro Transport at higher bit rates than with the non-SONET switch devices. In the Metro Transport communications, multiple Metro Access data streams can be combined and be communicated through the network at a higher bit rate than what is supported by the non-SONET switch devices. However, as described above, SONET communications can be bandwidth inefficient when communicating at any bit rate.
Recently, xe2x80x9cdata-aware SONETxe2x80x9d has been developed that provides statistical multiplexing and traffic over-subscription, both of which provide more efficient data transfer. However, current switches are limited to OC-12 line rates. Another deficiency of current SONET equipment is that separate aggregators are required at each line rate. For example, an aggregator receives multiple STS-3 signals and combines them into a single STS-12 or STS-48 signal. Further aggregation is provided by additional aggregation equipment. What is needed is an improved SONET equipment architecture.
Methods and apparatuses for laying out an integrated circuit having a first side and a second side opposite each other and a third side and a fourth side opposite each other are described. In one embodiment, a first plurality of input/output (I/O) ports are positioned along the first side, a plurality of queues are coupled to the first plurality of I/O ports, a first bus is positioned extending from the plurality of queues toward the second side to couple a control circuit to the plurality of queues, second plurality of I/O ports are positioned along the third side and the fourth side, and a second bus is positioned between the control circuit and the second plurality of I/O ports to couple the control circuit to the second plurality of I/O ports, wherein the first bus and the second bus are positioned such that the respective bus lines do not cross over each other. dr
The invention is illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings in which like reference numerals refer to similar elements.
FIG. 1a illustrates a basic synchronous optical network (SONET) ring connection.
FIG. 1b illustrates an example of conversion of electrical signals to optical SONET data.
FIG. 2 illustrates a basic SONET architecture having multiple SONET switches communicating at different bit rates.
FIG. 3 illustrates one embodiment of a SONET architecture having Trans-Metro Optical (TMO) switches.
FIG. 4 illustrates one embodiment of TMO traffic aggregation.
FIG. 5 illustrates a conceptual view of one embodiment of a TMO switch configuration.
FIG. 6 is a perspective view of one embodiment of a TMO switch chassis.
FIG. 7 illustrates multiple cards to be coupled with a backplane.
FIG. 8 illustrates one embodiment of an interconnection of a trunk card, a working cross-connect card, a protection cross-connect card and a tributary card.
FIG. 9a shows a conceptual illustration of a selection of a Master Sync signal from a set of potential Master Sync signals.
FIG. 9b is a block diagram of one embodiment of a high speed serial switching ASIC (HISSA).
FIG. 10 illustrates one embodiment of a cell for use in a time and space switching ASIC (TISSA).
FIG. 11 illustrates one embodiment of a multiplexer architecture for use in a TISSA cell.
FIG. 12 is a logical diagram of a layout of cells to provide TISSA functionality for a single port.
FIG. 13 illustrates one embodiment of a layout of a TISSA.
FIG. 14 illustrates a timing diagram associated with one embodiment of detection of a system clock failure.
FIG. 15 illustrates one embodiment of circuitry for detection of a system clock failure.
FIG. 16 illustrates a timing diagram for one embodiment of jitter protection.
FIG. 17 illustrates one embodiment of circuitry for jitter protection.
FIG. 18 is a conceptual illustration of one embodiment of bit stuffing.
FIG. 19 is a conceptual illustration of one embodiment of bit destuffing.
FIG. 20 illustrates one embodiment of circuitry for detecting a SONET frame threshold.
FIG. 21 illustrates one embodiment of cascaded 16xc3x9711 TISSAs to provide a 16xc3x9716 cross-connect.
FIG. 22 illustrates one embodiment of cascaded 16xc3x9711 TISSAs to provide a 32xc3x9732 cross-connect.
FIG. 23 illustrates one embodiment of cascaded 16xc3x9711 TISSAs to provide a 21xc3x9722 cross-connect.